Alif Semiconductor /AE302F80F5582AE_CM55_HP_View /LPTIMER /LPTIMER_CHANNEL_CFG[1] /LPTIMER_CONTROLREG

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Interpret as LPTIMER_CONTROLREG

31282724232019161512118743000000000000000000000000000000000000000000 (Val_0x0)TIMER_ENABLE0 (Val_0x0)TIMER_MODE0 (Val_0x0)TIMER_INTERRUPT_MASK0 (Val_0x0)TIMER_PWM0 (TIMER_0N100PWM_EN)TIMER_0N100PWM_EN

TIMER_PWM=Val_0x0, TIMER_MODE=Val_0x0, TIMER_INTERRUPT_MASK=Val_0x0, TIMER_ENABLE=Val_0x0

Description

Timer (n) Control Register

Fields

TIMER_ENABLE

Timer enable bit for Timer (n).

0 (Val_0x0): Timer (n) is disabled

1 (Val_0x1): Timer (n) is enabled

TIMER_MODE

Timer mode for Timer (n). Note: All bits of the LPTIMERn_LOADCOUNT register must be set to 1 before enabling Timer (n) in free-running mode.

0 (Val_0x0): Free-running count

1 (Val_0x1): User-defined count

TIMER_INTERRUPT_MASK

Timer interrupt mask for Timer (n).

0 (Val_0x0): Timer (n) interrupt is unmasked

1 (Val_0x1): Timer (n) interrupt is masked

TIMER_PWM

Pulse Width Modulation of Timer (n) toggle output.

0 (Val_0x0): PWM is disabled (normal toggle)

1 (Val_0x1): PWM is enabled (PWM toggle)

TIMER_0N100PWM_EN

0% and 100% PWM duty cycle mode for Timer (n). Hardcoded to enabled state to reduce software overhead.

1 (Val_0x1): Enabled

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